PIC18F6310解密实例

　　PIC18F6310 Features
　　CPU:
　　Up to 10 MIPS Performance
　　C compiler optimized RISC architecture
　　8x8 Single Cycle Hardware Multiply System:
　　Internal oscillator support-31 kHz to 8MHz, up to 32 MHz with 4xPLL
　　Fail-Safe Clock Monitor- allows safe shutdown if clock fails
　　Watchdog Timer with separate RC oscillator
　　Wide operating Voltage range; 2.0V to 5.5V nanoWatt Power Managed Modes
　　Run, Idle and SLEEP modes Analog Features:
　　10-bit ADC, 12 channels, 100K samples per second
　　Programmable Low Voltage Detection Module
　　Programmable Brown-out-Reset module
　　Two Analog Comparators Peripherals:
　　Master Synchronous Serial Port supports SPI and I2C master and slave mode
　　EUSART module including LIN bus support
　　Four Timer Modules
　　Three CCP